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    Subject[PATCH 5.10 388/530] iommu/vt-d: Dont set then clear private data in prq_event_thread()
    Date
    From: Lu Baolu <baolu.lu@linux.intel.com>

    [ Upstream commit 1d421058c815d54113d9afdf6db3f995c788cf0d ]

    The VT-d specification (section 7.6) requires that the value in the
    Private Data field of a Page Group Response Descriptor must match
    the value in the Private Data field of the respective Page Request
    Descriptor.

    The private data field of a page group response descriptor is set then
    immediately cleared in prq_event_thread(). This breaks the rule defined
    by the VT-d specification. Fix it by moving clearing code up.

    Fixes: 5b438f4ba315d ("iommu/vt-d: Support page request in scalable mode")
    Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
    Reviewed-by: Liu Yi L <yi.l.liu@intel.com>
    Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
    Link: https://lore.kernel.org/r/20210320024156.640798-1-baolu.lu@linux.intel.com
    Signed-off-by: Joerg Roedel <jroedel@suse.de>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/iommu/intel/svm.c | 4 ++--
    1 file changed, 2 insertions(+), 2 deletions(-)

    diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c
    index 5c95e9693bf5..d79639b5b8a9 100644
    --- a/drivers/iommu/intel/svm.c
    +++ b/drivers/iommu/intel/svm.c
    @@ -1071,12 +1071,12 @@ no_pasid:
    QI_PGRP_RESP_TYPE;
    resp.qw1 = QI_PGRP_IDX(req->prg_index) |
    QI_PGRP_LPIG(req->lpig);
    + resp.qw2 = 0;
    + resp.qw3 = 0;

    if (req->priv_data_present)
    memcpy(&resp.qw2, req->priv_data,
    sizeof(req->priv_data));
    - resp.qw2 = 0;
    - resp.qw3 = 0;
    qi_submit_sync(iommu, &resp, 1, 0);
    }
    prq_advance:
    --
    2.30.2


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