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    Subject[PATCH 5.10 158/530] arm64: dts: qcom: sm8150: fix number of pins in gpio-ranges
    Date
    From: Shawn Guo <shawn.guo@linaro.org>

    [ Upstream commit de3abdf3d15c6e7f456e2de3f9da78f3a31414cc ]

    The last cell of 'gpio-ranges' should be number of GPIO pins, and in
    case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather
    than msm_pinctrl_soc_data.ngpio - 1.

    This fixes the problem that when the last GPIO pin in the range is
    configured with the following call sequence, it always fails with
    -EPROBE_DEFER.

    pinctrl_gpio_set_config()
    pinctrl_get_device_gpio_range()
    pinctrl_match_gpio_range()

    Fixes: e13c6d144fa0 ("arm64: dts: qcom: sm8150: Add base dts file")
    Cc: Vinod Koul <vkoul@kernel.org>
    Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
    Link: https://lore.kernel.org/r/20210303033106.549-3-shawn.guo@linaro.org
    Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
    index f0a872e02686..1aec54590a11 100644
    --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
    +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
    @@ -748,7 +748,7 @@
    <0x0 0x03D00000 0x0 0x300000>;
    reg-names = "west", "east", "north", "south";
    interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
    - gpio-ranges = <&tlmm 0 0 175>;
    + gpio-ranges = <&tlmm 0 0 176>;
    gpio-controller;
    #gpio-cells = <2>;
    interrupt-controller;
    --
    2.30.2


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