lkml.org 
[lkml]   [2021]   [May]   [12]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 5.10 159/530] arm64: dts: qcom: sm8250: fix number of pins in gpio-ranges
    Date
    From: Shawn Guo <shawn.guo@linaro.org>

    [ Upstream commit e526cb03e2aed42866a0919485a3d8ac130972cf ]

    The last cell of 'gpio-ranges' should be number of GPIO pins, and in
    case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather
    than msm_pinctrl_soc_data.ngpio - 1.

    This fixes the problem that when the last GPIO pin in the range is
    configured with the following call sequence, it always fails with
    -EPROBE_DEFER.

    pinctrl_gpio_set_config()
    pinctrl_get_device_gpio_range()
    pinctrl_match_gpio_range()

    Fixes: 16951b490b20 ("arm64: dts: qcom: sm8250: Add TLMM pinctrl node")
    Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
    Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
    Link: https://lore.kernel.org/r/20210303033106.549-4-shawn.guo@linaro.org
    Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
    index f96c8a4fc3cc..d4547a192748 100644
    --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
    +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
    @@ -1555,7 +1555,7 @@
    #gpio-cells = <2>;
    interrupt-controller;
    #interrupt-cells = <2>;
    - gpio-ranges = <&tlmm 0 0 180>;
    + gpio-ranges = <&tlmm 0 0 181>;
    wakeup-parent = <&pdc>;

    qup_i2c0_default: qup-i2c0-default {
    --
    2.30.2


    \
     
     \ /
      Last update: 2021-05-12 18:02    [W:2.190 / U:0.788 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site