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SubjectRe: [PATCH v10 18/21] drm/mediatek: Add mt8195 Embedded DisplayPort driver
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On Thu, 2022-06-09 at 17:37 +0800, CK Hu wrote:
> Hi, Rex:
>
> On Mon, 2022-05-23 at 12:47 +0200, Guillaume Ranquet wrote:
> > From: Markus Schneider-Pargmann <msp@baylibre.com>
> >
> > This patch adds a DisplayPort driver for the Mediatek mt8195 SoC.
> >
> > It supports the mt8195, the embedded DisplayPort units. It offers
> > DisplayPort 1.4 with up to 4 lanes.
> >
> > The driver creates a child device for the phy. The child device
> > will
> > never exist without the parent being active. As they are sharing a
> > register range, the parent passes a regmap pointer to the child so
> > that
> > both can work with the same register range. The phy driver sets
> > device
> > data that is read by the parent to get the phy device that can be
> > used
> > to control the phy properties.
> >
> > This driver is based on an initial version by
> > Jason-JH.Lin <jason-jh.lin@mediatek.com>.
> >
> > Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
> > Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
> > ---
>
> [snip]
>
> > +
> > +static int mtk_dp_power_disable(struct mtk_dp *mtk_dp)
> > +{
> > + int ret;
> > +
> > + ret = mtk_dp_write(mtk_dp, MTK_DP_TOP_PWR_STATE, 0);
> > +
> > + if (ret)
> > + return ret;
> > +
> > + ret = mtk_dp_write(mtk_dp, MTK_DP_0034,
>
> MTK_DP_0034 is defined as:
>
> +#define MTK_DP_0034 (BIT(2) | BIT(4) | BIT(5))
>
> I think this a weird address.
>
> > + DA_CKM_CKTX0_EN_FORCE_EN |
> > DA_CKM_BIAS_LPF_EN_FORCE_VAL |
> > + DA_CKM_BIAS_EN_FORCE_VAL |
> > + DA_XTP_GLB_LDO_EN_FORCE_VAL |
> > + DA_XTP_GLB_AVD10_ON_FORCE_VAL);
> > +
> > + if (ret)
> > + return ret;
> > +
> > + /* Disable RX */
> > + ret = mtk_dp_write(mtk_dp, MTK_DP_1040, 0);
>
>
> MTK_DP_1040 is defined as:
>
> +#define MTK_DP_1040 (BIT(6) | BIT(12))
>
> I think this a weird address.
>
> Regards,
> CK
>

Hello CK,

I will change them to 0x34 and 0x1040.

BRs,
Rex

> > +
> > + if (ret)
> > + return ret;
> > +
> > + ret = mtk_dp_write(mtk_dp, MTK_DP_TOP_MEM_PD,
> > + 0x550 | BIT(FUSE_SEL_SHIFT) |
> > BIT(MEM_ISO_EN_SHIFT));
> > +
> > + return ret;
> > +}
>
>

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