Messages in this thread | | | Date | Fri, 11 Nov 2022 12:59:45 +0100 | From | Robert Richter <> | Subject | Re: [PATCH v3 8/9] cxl/pci: Extend devm_cxl_port_enumerate_dports() to support restricted hosts (RCH) |
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On 09.11.22 11:40:58, Robert Richter wrote:
> diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c > index 667de4f125f6..a6b1a1501db3 100644 > --- a/drivers/cxl/core/pci.c > +++ b/drivers/cxl/core/pci.c > @@ -48,6 +48,37 @@ static int pci_dev_add_dport(struct pci_dev *pdev, struct cxl_port *port, > return 0; > } > > +static int restricted_host_enumerate_dport(struct cxl_port *port, > + struct pci_bus *bus) > +{ > + struct pci_dev *pdev; > + bool is_restricted_host; > + int rc; > + > + /* Check CXL DVSEC of dev 0 func 0 */ > + pdev = pci_get_slot(bus, PCI_DEVFN(0, 0)); > + > + is_restricted_host = pdev > + && (pci_pcie_type(pdev) == PCI_EXP_TYPE_RC_END) > + && pci_find_dvsec_capability(pdev, > + PCI_DVSEC_VENDOR_ID_CXL, > + CXL_DVSEC_PCIE_DEVICE); > + if (is_restricted_host) > + rc = pci_dev_add_dport(pdev, port, CXL_RESOURCE_NONE);
See my comment in patch #6. This reads the port id from RCiEP's PCIe cap, but instead the RCD UP RCRB should be used for this. pci_dev_add_dport() needs to be updated to handle that.
-Robert
> + > + pci_dev_put(pdev); > + > + if (!is_restricted_host) > + return 0; > + > + dev_dbg(bus->bridge, "CXL restricted host found\n"); > + > + if (rc) > + return rc; > + > + return 1; > +}
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