lkml.org 
[lkml]   [2022]   [Nov]   [9]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH v3 8/9] cxl/pci: Extend devm_cxl_port_enumerate_dports() to support restricted hosts (RCH)
    Date
    The PCIe Software View of an RCH and RCD is different to VH mode. An
    RCD is paired with an RCH and shows up as RCiEP. Its downstream and
    upstream ports are hidden to the PCI hierarchy. This different PCI
    topology requires a different handling of RCHs.

    Extend devm_cxl_port_enumerate_dports() to support restricted hosts
    (RCH). If an RCH is detected, register its port as dport to the
    device. An RCH is found if the host's dev 0 func 0 devices is an RCiEP
    with an existing PCIe DVSEC for CXL Devices (ID 0000h).

    Signed-off-by: Robert Richter <rrichter@amd.com>
    ---
    drivers/cxl/core/pci.c | 37 ++++++++++++++++++++++++++++++++++++-
    1 file changed, 36 insertions(+), 1 deletion(-)

    diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
    index 667de4f125f6..a6b1a1501db3 100644
    --- a/drivers/cxl/core/pci.c
    +++ b/drivers/cxl/core/pci.c
    @@ -48,6 +48,37 @@ static int pci_dev_add_dport(struct pci_dev *pdev, struct cxl_port *port,
    return 0;
    }

    +static int restricted_host_enumerate_dport(struct cxl_port *port,
    + struct pci_bus *bus)
    +{
    + struct pci_dev *pdev;
    + bool is_restricted_host;
    + int rc;
    +
    + /* Check CXL DVSEC of dev 0 func 0 */
    + pdev = pci_get_slot(bus, PCI_DEVFN(0, 0));
    +
    + is_restricted_host = pdev
    + && (pci_pcie_type(pdev) == PCI_EXP_TYPE_RC_END)
    + && pci_find_dvsec_capability(pdev,
    + PCI_DVSEC_VENDOR_ID_CXL,
    + CXL_DVSEC_PCIE_DEVICE);
    + if (is_restricted_host)
    + rc = pci_dev_add_dport(pdev, port, CXL_RESOURCE_NONE);
    +
    + pci_dev_put(pdev);
    +
    + if (!is_restricted_host)
    + return 0;
    +
    + dev_dbg(bus->bridge, "CXL restricted host found\n");
    +
    + if (rc)
    + return rc;
    +
    + return 1;
    +}
    +
    static int match_add_dports(struct pci_dev *pdev, void *data)
    {
    struct cxl_walk_context *ctx = data;
    @@ -91,11 +122,15 @@ int devm_cxl_port_enumerate_dports(struct cxl_port *port)
    {
    struct pci_bus *bus = cxl_port_to_pci_bus(port);
    struct cxl_walk_context ctx;
    - int type;
    + int type, count;

    if (!bus)
    return -ENXIO;

    + count = restricted_host_enumerate_dport(port, bus);
    + if (count)
    + return count;
    +
    if (pci_is_root_bus(bus))
    type = PCI_EXP_TYPE_ROOT_PORT;
    else
    --
    2.30.2
    \
     
     \ /
      Last update: 2022-11-09 11:42    [W:5.594 / U:0.068 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site