Messages in this thread | | | Date | Wed, 16 Nov 2022 11:36:36 -0800 | From | Dan Williams <> | Subject | RE: [PATCH v3 6/9] cxl/pci: Do not ignore PCI config read errors in match_add_dports() |
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Robert Richter wrote: > The link capabilities of a PCI device are read when enumerating its > dports. This is done by reading the PCI config space. If that fails > port enumeration ignores that error. However, reading the PCI config > space should reliably work. > > To reduce some complexity to the code flow when factoring out parts of > the code in match_add_dports() for later reuse, change this to throw > an error. > > Signed-off-by: Robert Richter <rrichter@amd.com> > --- > drivers/cxl/core/pci.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c > index 0dbbe8d39b07..8271b8abde7a 100644 > --- a/drivers/cxl/core/pci.c > +++ b/drivers/cxl/core/pci.c > @@ -47,7 +47,7 @@ static int match_add_dports(struct pci_dev *pdev, void *data)
match_add_dports() never comes into play in the RCH topology case. There are no switch ports to handle and CXL host-bridges are only ever dports in the RCH case.
I will post the cxl_test enabling for an RCH topology so we can compare notes there.
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