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SubjectRE: [PATCH 00/15] cxl: Add support for Restricted CXL hosts (RCD mode)
Apologies for the delay in getting to this I had hoped to be able to
finish up some other DAX work to focus on this, but time is getting
short so I will need to do both in parallel.

Robert Richter wrote:
> In Restricted CXL Device (RCD) mode (formerly referred to as CXL 1.1)
> the PCIe enumeration hierarchy is different from CXL VH Enumeration
> (formerly referred to as 2.0, for both modes see CXL spec 3.0: 9.11
> and 9.12, [1]). This series adds support for RCD mode. It implements
> the detection of Restricted CXL Hosts (RCHs) and its corresponding
> Restricted CXL Devices (RCDs). It does the necessary enumeration of
> ports and connects the endpoints. With all the plumbing an RCH/RCD
> pair is registered at the Linux CXL bus and becomes visible in sysfs
> in the same way as CXL VH hosts and devices do already. RCDs are
> brought up as CXL endpoints and bound to subsequent drivers such as
> cxl_mem.
>
> For CXL VH the host driver (cxl_acpi) starts host bridge discovery
> once the ACPI0017 CXL root device is detected and then searches for
> ACPI0016 host bridges to enable CXL. In RCD mode an ACPI0017 device
> might not necessarily exist

That's a broken BIOS as far as I can see. No ACPI0017 == no OS CXL
services and the CXL aspects of the device need to be 100% managed by
the BIOS. You can still run the cxl_pci driver in that case for mailbox
operation, but error handling must be firmware-first without ACPI0017.

> PCIe host bridge PNP0A08 ID, there aren't any CXL port or switches in
> the PCIe hierarchy visible. As such the RCD mode enumeration and host
> discovery is very different from CXL VH. See patch #5 for
> implementation details.
>
> This implementation expects the host's downstream and upstream port
> RCRBs base address being reported by firmware using the optional CEDT
> CHBS entry of the host bridge (see CXL spec 3.0, 9.17.1.2).
>
> RCD mode does not support hot-plug, so host discovery is at boot time
> only.
>
> Patches #1 to #4 are prerequisites of the series with fixes needed and
> a rework of debug messages for port enumeration. Those are general
> patches and could be applied earlier and independently from the rest
> assuming there are no objections with them. Patches #5 to #15 contain
> the actual implementation of RCD mode support.
>
> [1] https://www.computeexpresslink.org/spec-landing
>
> Robert Richter (15):
> cxl/core: Remove duplicate declaration of devm_cxl_iomap_block()
> cxl/core: Check physical address before mapping it in
> devm_cxl_iomap_block()
> cxl: Unify debug messages when calling devm_cxl_add_port()
> cxl: Unify debug messages when calling devm_cxl_add_dport()
> cxl/acpi: Add probe function to detect restricted CXL hosts in RCD
> mode
> PCI/ACPI: Link host bridge to its ACPI fw node
> cxl/acpi: Check RCH's PCIe Host Bridge ACPI ID
> cxl/acpi: Check RCH's CXL DVSEC capabilities
> cxl/acpi: Determine PCI host bridge's ACPI UID
> cxl/acpi: Extract the RCH's RCRB base address from CEDT
> cxl/acpi: Extract the host's component register base address from RCRB
> cxl/acpi: Skip devm_cxl_port_enumerate_dports() when in RCD mode
> cxl/acpi: Rework devm_cxl_enumerate_ports() to support RCD mode
> cxl/acpi: Enumerate ports in RCD mode to enable RCHs and RCDs
> cxl/acpi: Specify module load order dependency for the cxl_acpi module
>
> drivers/acpi/pci_root.c | 1 +
> drivers/cxl/acpi.c | 311 ++++++++++++++++++++++++++++++++++-
> drivers/cxl/core/pci.c | 22 ++-
> drivers/cxl/core/port.c | 103 ++++++++----
> drivers/cxl/core/regs.c | 3 +
> drivers/cxl/cxl.h | 2 -
> drivers/cxl/mem.c | 1 +
> tools/testing/cxl/test/cxl.c | 8 +-
> 8 files changed, 400 insertions(+), 51 deletions(-)
>
> --
> 2.30.2
>


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