Messages in this thread | | | Date | Tue, 15 Feb 2022 16:43:47 +0000 | From | Yazen Ghannam <> | Subject | Re: [PATCH v7 08/12] EDAC/amd64: Add Family ops to update GPU csrow and channel info |
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On Thu, Feb 03, 2022 at 11:49:38AM -0600, Naveen Krishna Chatradhi wrote: > GPU node has 'X' number of PHYs and 'Y' number of channels. > This results in 'X*Y' number of instances in the Data Fabric. > Therefore the Data Fabric ID of an instance in GPU as below: > df_inst_id = 'X' * number of channels per PHY + 'Y' > > On CPUs the Data Fabric ID of an instance on a CPU is equal to the > UMC number. since the UMC number and channel are equal in CPU nodes, > the channel can be used as the Data Fabric ID of the instance. > > Cc: Yazen Ghannam <yazen.ghannam@amd.com> > Co-developed-by: Muralidhara M K <muralimk@amd.com> > Signed-off-by: Muralidhara M K <muralimk@amd.com> > Signed-off-by: Naveen Krishna Chatradhi <nchatrad@amd.com> > --- > v1->v7: > * New change in v7 > > drivers/edac/amd64_edac.c | 60 +++++++++++++++++++++++++++++++++++++-- > drivers/edac/amd64_edac.h | 2 ++ > 2 files changed, 60 insertions(+), 2 deletions(-) > > diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c > index 10efe726a959..241419a0be93 100644 > --- a/drivers/edac/amd64_edac.c > +++ b/drivers/edac/amd64_edac.c > @@ -3653,6 +3653,30 @@ static inline void decode_bus_error(int node_id, struct mce *m) > __log_ecc_error(mci, &err, ecc_type); > } > > +/* > + * On CPUs, The Data Fabric ID of an instance is equal to the UMC number. > + * And since the UMC number and channel are equal in CPU nodes, the channel can be used > + * as the Data Fabric ID of the instance. > + */ > +static int f17_df_inst_id(struct mem_ctl_info *mci, struct amd64_pvt *pvt, > + struct err_info *err) > +{ > + return err->channel; > +} > + > +/* > + * A GPU node has 'X' number of PHYs and 'Y' number of channels. > + * This results in 'X*Y' number of instances in the Data Fabric. > + * Therefore the Data Fabric ID of an instance can be found with the following formula: > + * df_inst_id = 'X' * number of channels per PHY + 'Y' > + * > + */ > +static int gpu_df_inst_id(struct mem_ctl_info *mci, struct amd64_pvt *pvt, > + struct err_info *err) > +{ > + return (err->csrow * pvt->channel_count / mci->nr_csrows) + err->channel; > +} > +
The DF Instance ID needs to get adjusted again later in the translation code due to the fixed mapping of CSes to UMCs. Can that be done here instead? Also, I assume that fixed mapping is unique to each product, so that would make it a good fit for the family/pvt ops.
Thanks, Yazen
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