Messages in this thread Patch in this message | | | From | Naveen Krishna Chatradhi <> | Subject | [PATCH v7 09/12] EDAC/amd64: Add check for when to add DRAM base and hole | Date | Thu, 3 Feb 2022 11:49:39 -0600 |
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From: Yazen Ghannam <yazen.ghannam@amd.com>
Some DF versions and interleaving modes require the DRAM base address and hole adjustments to be done before accounting for hashing. Others require this to be done after.
Add a check for this behavior. Save a boolean in the ctx struct which can be appropriately set based on DF version or interleaving mode.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Naveen Krishna Chatradhi <nchatrad@amd.com> --- Link: https://lkml.kernel.org/r/20211028175728.121452-32-yazen.ghannam@amd.com
v4->v7: * Was patch 31 in v3.
v2->v3: * New in v3.
drivers/edac/amd64_edac.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 241419a0be93..0f35c8519555 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -1112,6 +1112,7 @@ struct addr_ctx { u8 intlv_num_sockets; u8 cs_id; u8 node_id_shift; + bool late_hole_remove; int (*dehash_addr)(struct addr_ctx *ctx); void (*make_space_for_cs_id)(struct addr_ctx *ctx); void (*insert_cs_id)(struct addr_ctx *ctx); @@ -1676,7 +1677,7 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr return -EINVAL; } - if (add_base_and_hole(&ctx)) { + if (!ctx.late_hole_remove && add_base_and_hole(&ctx)) { pr_debug("Failed to add DRAM base address and hole"); return -EINVAL; } @@ -1686,6 +1687,11 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr return -EINVAL; } + if (ctx.late_hole_remove && add_base_and_hole(&ctx)) { + pr_debug("Failed to add DRAM base address and hole"); + return -EINVAL; + } + if (addr_over_limit(&ctx)) { pr_debug("Calculated address is over limit"); return -EINVAL; -- 2.25.1
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