lkml.org 
[lkml]   [2023]   [Jan]   [13]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Subject[PATCH v1 20/20] ARM: dts: imx6ul-prti6g: configure ethernet reference clock parent
Date
On this board the PHY is the ref clock provider. So, configure ethernet
reference clock as input.

Without this patch we have relatively high amount of dropped packets.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
arch/arm/boot/dts/imx6ul-prti6g.dts | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/imx6ul-prti6g.dts b/arch/arm/boot/dts/imx6ul-prti6g.dts
index c18390f238e1..b7c96fbe7a91 100644
--- a/arch/arm/boot/dts/imx6ul-prti6g.dts
+++ b/arch/arm/boot/dts/imx6ul-prti6g.dts
@@ -26,6 +26,7 @@ clock_ksz8081_out: clock-ksz8081-out {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
+ clock-output-names = "enet1_ref_pad";
};

leds {
@@ -60,6 +61,13 @@ &can2 {
status = "okay";
};

+&clks {
+ clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>, <&clock_ksz8081_out>;
+ clock-names = "ckil", "osc", "ipp_di0", "ipp_di1", "enet1_ref_pad";
+ assigned-clocks = <&clks IMX6UL_CLK_ENET1_REF_SEL>;
+ assigned-clock-parents = <&clock_ksz8081_out>;
+};
+
&ecspi1 {
cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
@@ -85,12 +93,6 @@ &fec1 {
pinctrl-0 = <&pinctrl_eth1>;
phy-mode = "rmii";
phy-handle = <&rmii_phy>;
- clocks = <&clks IMX6UL_CLK_ENET>,
- <&clks IMX6UL_CLK_ENET_AHB>,
- <&clks IMX6UL_CLK_ENET_PTP>,
- <&clock_ksz8081_out>;
- clock-names = "ipg", "ahb", "ptp",
- "enet_clk_ref";
status = "okay";

mdio {
--
2.30.2
\
 
 \ /
  Last update: 2023-03-26 23:39    [W:0.139 / U:0.808 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site