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SubjectRe: [PATCH v8 06/26] memory: tegra30: Add FIFO sizes to memory clients
On Wed, Nov 11, 2020 at 04:14:36AM +0300, Dmitry Osipenko wrote:
> The latency allowness is calculated based on buffering capabilities of
> memory clients. Add FIFO sizes to the Tegra30 memory clients.
>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
> drivers/memory/tegra/tegra30.c | 66 ++++++++++++++++++++++++++++++++++
> 1 file changed, 66 insertions(+)

Thanks, applied.

Best regards,
Krzysztof

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