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    Subject[PATCH v8 24/26] ARM: tegra: Add DVFS properties to Tegra20 EMC device-tree node
    Date
    Add EMC OPP DVFS table that will be used for dynamic scaling of memory
    frequency/voltage. Update board device-trees with optional EMC core supply
    and remove unsupported OPPs.

    Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
    ---
    .../boot/dts/tegra20-acer-a500-picasso.dts | 7 ++
    arch/arm/boot/dts/tegra20-colibri.dtsi | 4 +
    arch/arm/boot/dts/tegra20-paz00.dts | 6 ++
    .../arm/boot/dts/tegra20-peripherals-opp.dtsi | 92 +++++++++++++++++++
    arch/arm/boot/dts/tegra20.dtsi | 3 +
    5 files changed, 112 insertions(+)
    create mode 100644 arch/arm/boot/dts/tegra20-peripherals-opp.dtsi

    diff --git a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
    index a0b829738e8f..b4ed88802387 100644
    --- a/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
    +++ b/arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
    @@ -1061,6 +1061,8 @@ map0 {
    memory-controller@7000f400 {
    nvidia,use-ram-code;

    + core-supply = <&vdd_core>;
    +
    emc-tables@0 {
    nvidia,ram-code = <0>; /* elpida-8gb */

    @@ -1450,3 +1452,8 @@ emc-table@300000 {
    };
    };
    };
    +
    +&emc_icc_dvfs_opp_table {
    + /delete-node/ opp@666000000;
    + /delete-node/ opp@760000000;
    +};
    diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
    index 6162d193e12c..585a5b441cf6 100644
    --- a/arch/arm/boot/dts/tegra20-colibri.dtsi
    +++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
    @@ -742,6 +742,10 @@ sound {
    };
    };

    +&emc_icc_dvfs_opp_table {
    + /delete-node/ opp@760000000;
    +};
    +
    &gpio {
    lan-reset-n {
    gpio-hog;
    diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
    index ada2bed8b1b5..52a81d888424 100644
    --- a/arch/arm/boot/dts/tegra20-paz00.dts
    +++ b/arch/arm/boot/dts/tegra20-paz00.dts
    @@ -314,6 +314,8 @@ nvec@7000c500 {
    memory-controller@7000f400 {
    nvidia,use-ram-code;

    + core-supply = <&core_vdd_reg>;
    +
    emc-tables@0 {
    nvidia,ram-code = <0x0>;
    #address-cells = <1>;
    @@ -662,3 +664,7 @@ cpu@1 {
    };
    };
    };
    +
    +&emc_icc_dvfs_opp_table {
    + /delete-node/ opp@760000000;
    +};
    diff --git a/arch/arm/boot/dts/tegra20-peripherals-opp.dtsi b/arch/arm/boot/dts/tegra20-peripherals-opp.dtsi
    new file mode 100644
    index 000000000000..25b1ba73951e
    --- /dev/null
    +++ b/arch/arm/boot/dts/tegra20-peripherals-opp.dtsi
    @@ -0,0 +1,92 @@
    +// SPDX-License-Identifier: GPL-2.0
    +
    +/ {
    + emc_icc_dvfs_opp_table: emc-dvfs-opp-table {
    + compatible = "operating-points-v2";
    +
    + opp@36000000 {
    + opp-microvolt = <950000 950000 1300000>;
    + opp-hz = /bits/ 64 <36000000>;
    + };
    +
    + opp@47500000 {
    + opp-microvolt = <950000 950000 1300000>;
    + opp-hz = /bits/ 64 <47500000>;
    + };
    +
    + opp@50000000 {
    + opp-microvolt = <950000 950000 1300000>;
    + opp-hz = /bits/ 64 <50000000>;
    + };
    +
    + opp@54000000 {
    + opp-microvolt = <950000 950000 1300000>;
    + opp-hz = /bits/ 64 <54000000>;
    + };
    +
    + opp@57000000 {
    + opp-microvolt = <950000 950000 1300000>;
    + opp-hz = /bits/ 64 <57000000>;
    + };
    +
    + opp@100000000 {
    + opp-microvolt = <1000000 1000000 1300000>;
    + opp-hz = /bits/ 64 <100000000>;
    + };
    +
    + opp@108000000 {
    + opp-microvolt = <1000000 1000000 1300000>;
    + opp-hz = /bits/ 64 <108000000>;
    + };
    +
    + opp@126666000 {
    + opp-microvolt = <1000000 1000000 1300000>;
    + opp-hz = /bits/ 64 <126666000>;
    + };
    +
    + opp@150000000 {
    + opp-microvolt = <1000000 1000000 1300000>;
    + opp-hz = /bits/ 64 <150000000>;
    + };
    +
    + opp@190000000 {
    + opp-microvolt = <1000000 1000000 1300000>;
    + opp-hz = /bits/ 64 <190000000>;
    + };
    +
    + opp@216000000 {
    + opp-microvolt = <1000000 1000000 1300000>;
    + opp-hz = /bits/ 64 <216000000>;
    + };
    +
    + opp@300000000 {
    + opp-microvolt = <1000000 1000000 1300000>;
    + opp-hz = /bits/ 64 <300000000>;
    + };
    +
    + opp@333000000 {
    + opp-microvolt = <1000000 1000000 1300000>;
    + opp-hz = /bits/ 64 <333000000>;
    + };
    +
    + opp@380000000 {
    + opp-microvolt = <1100000 1100000 1300000>;
    + opp-hz = /bits/ 64 <380000000>;
    + };
    +
    + opp@600000000 {
    + opp-microvolt = <1200000 1200000 1300000>;
    + opp-hz = /bits/ 64 <600000000>;
    + };
    +
    + opp@666000000 {
    + opp-microvolt = <1200000 1200000 1300000>;
    + opp-hz = /bits/ 64 <666000000>;
    + };
    +
    + opp@760000000 {
    + opp-microvolt = <1300000 1300000 1300000>;
    + opp-hz = /bits/ 64 <760000000>;
    + };
    + };
    +};
    diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
    index 8f8ad81916e7..6ce498178105 100644
    --- a/arch/arm/boot/dts/tegra20.dtsi
    +++ b/arch/arm/boot/dts/tegra20.dtsi
    @@ -6,6 +6,8 @@
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/soc/tegra-pmc.h>

    +#include "tegra20-peripherals-opp.dtsi"
    +
    / {
    compatible = "nvidia,tegra20";
    interrupt-parent = <&lic>;
    @@ -664,6 +666,7 @@ emc: memory-controller@7000f400 {
    #size-cells = <0>;
    #interconnect-cells = <0>;

    + operating-points-v2 = <&emc_icc_dvfs_opp_table>;
    nvidia,memory-controller = <&mc>;
    };

    --
    2.29.2
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