| From | Greg Kroah-Hartman <> | Subject | [PATCH 4.0 048/220] megaraid_sas: use raw_smp_processor_id() | Date | Sat, 2 May 2015 20:59:23 +0200 |
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4.0-stable review patch. If anyone has any objections, please let me know.
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From: Christoph Hellwig <hch@infradead.org>
commit 16b8528d20607925899b1df93bfd8fbab98d267c upstream.
We only want to steer the I/O completion towards a queue, but don't actually access any per-CPU data, so the raw_ version is fine to use and avoids the warnings when using smp_processor_id().
Signed-off-by: Christoph Hellwig <hch@lst.de> Reported-by: Andy Lutomirski <luto@kernel.org> Tested-by: Andy Lutomirski <luto@kernel.org> Acked-by: Sumit Saxena <sumit.saxena@avagotech.com> Signed-off-by: James Bottomley <JBottomley@Odin.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
--- drivers/scsi/megaraid/megaraid_sas_fusion.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-)
--- a/drivers/scsi/megaraid/megaraid_sas_fusion.c +++ b/drivers/scsi/megaraid/megaraid_sas_fusion.c @@ -1584,11 +1584,11 @@ megasas_build_ldio_fusion(struct megasas fp_possible = io_info.fpOkForIo; } - /* Use smp_processor_id() for now until cmd->request->cpu is CPU + /* Use raw_smp_processor_id() for now until cmd->request->cpu is CPU id by default, not CPU group id, otherwise all MSI-X queues won't be utilized */ cmd->request_desc->SCSIIO.MSIxIndex = instance->msix_vectors ? - smp_processor_id() % instance->msix_vectors : 0; + raw_smp_processor_id() % instance->msix_vectors : 0; if (fp_possible) { megasas_set_pd_lba(io_request, scp->cmd_len, &io_info, scp, @@ -1693,7 +1693,10 @@ megasas_build_dcdb_fusion(struct megasas << MR_RAID_CTX_RAID_FLAGS_IO_SUB_TYPE_SHIFT; cmd->request_desc->SCSIIO.DevHandle = io_request->DevHandle; cmd->request_desc->SCSIIO.MSIxIndex = - instance->msix_vectors ? smp_processor_id() % instance->msix_vectors : 0; + instance->msix_vectors ? + raw_smp_processor_id() % + instance->msix_vectors : + 0; os_timeout_value = scmd->request->timeout / HZ; if (instance->secure_jbod_support &&
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