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SubjectRe: [PATCH v2 10/23] arm64: dts: Update cache properties for lg
(subset for cc list)
Hello,
Just a reminder in case the patch was forgotten,
Regards,
Pierre

On 11/7/22 16:57, Pierre Gondois wrote:
> The DeviceTree Specification v0.3 specifies that the cache node
> 'compatible' and 'cache-level' properties are 'required'. Cf.
> s3.8 Multi-level and Shared Cache Nodes
> The 'cache-unified' property should be present if one of the
> properties for unified cache is present ('cache-size', ...).
>
> Update the Device Trees accordingly.
>
> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
> ---
> arch/arm64/boot/dts/lg/lg1312.dtsi | 1 +
> arch/arm64/boot/dts/lg/lg1313.dtsi | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi b/arch/arm64/boot/dts/lg/lg1312.dtsi
> index 78ae73d0cf36..25ed9aeee2dc 100644
> --- a/arch/arm64/boot/dts/lg/lg1312.dtsi
> +++ b/arch/arm64/boot/dts/lg/lg1312.dtsi
> @@ -48,6 +48,7 @@ cpu3: cpu@3 {
> };
> L2_0: l2-cache0 {
> compatible = "cache";
> + cache-level = <2>;
> };
> };
>
> diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi b/arch/arm64/boot/dts/lg/lg1313.dtsi
> index 2173316573be..db82fd4cc759 100644
> --- a/arch/arm64/boot/dts/lg/lg1313.dtsi
> +++ b/arch/arm64/boot/dts/lg/lg1313.dtsi
> @@ -48,6 +48,7 @@ cpu3: cpu@3 {
> };
> L2_0: l2-cache0 {
> compatible = "cache";
> + cache-level = <2>;
> };
> };
>

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