Messages in this thread | | | Date | Tue, 8 Nov 2022 12:42:21 +0100 | From | Matthias Brugger <> | Subject | Re: [PATCH v2 12/23] arm64: dts: Update cache properties for mediatek |
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On 07/11/2022 16:57, Pierre Gondois wrote: > The DeviceTree Specification v0.3 specifies that the cache node > 'compatible' and 'cache-level' properties are 'required'. Cf. > s3.8 Multi-level and Shared Cache Nodes > The 'cache-unified' property should be present if one of the > properties for unified cache is present ('cache-size', ...). > > Update the Device Trees accordingly. > > Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Applied, thanks, Matthias
> --- > arch/arm64/boot/dts/mediatek/mt8186.dtsi | 3 +++ > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 3 +++ > arch/arm64/boot/dts/mediatek/mt8195.dtsi | 3 +++ > 3 files changed, 9 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > index 64693c17af9e..c326aeb33a10 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi > @@ -198,16 +198,19 @@ cluster_off_b: cluster-off-b { > > l2_0: l2-cache0 { > compatible = "cache"; > + cache-level = <2>; > next-level-cache = <&l3_0>; > }; > > l2_1: l2-cache1 { > compatible = "cache"; > + cache-level = <2>; > next-level-cache = <&l3_0>; > }; > > l3_0: l3-cache { > compatible = "cache"; > + cache-level = <3>; > }; > }; > > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > index 6b20376191a7..424fc89cc6f7 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi > @@ -169,16 +169,19 @@ core3 { > > l2_0: l2-cache0 { > compatible = "cache"; > + cache-level = <2>; > next-level-cache = <&l3_0>; > }; > > l2_1: l2-cache1 { > compatible = "cache"; > + cache-level = <2>; > next-level-cache = <&l3_0>; > }; > > l3_0: l3-cache { > compatible = "cache"; > + cache-level = <3>; > }; > > idle-states { > diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi > index 905d1a90b406..cb74905cfbb8 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi > @@ -213,16 +213,19 @@ cluster_off_b: cluster-off-b { > > l2_0: l2-cache0 { > compatible = "cache"; > + cache-level = <2>; > next-level-cache = <&l3_0>; > }; > > l2_1: l2-cache1 { > compatible = "cache"; > + cache-level = <2>; > next-level-cache = <&l3_0>; > }; > > l3_0: l3-cache { > compatible = "cache"; > + cache-level = <3>; > }; > }; >
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