Messages in this thread Patch in this message | | | From | Viraj Shah <> | Subject | [PATCH v1 2/4] soc: imx: imx8m-blk-ctrl: Display Power ON sequence | Date | Mon, 2 May 2022 12:02:31 +0200 |
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Enable the dispmix software clock and release the resets as shown in the 5.2.9.5 section of reference manual.
Signed-off-by: Viraj Shah <viraj.shah@linutronix.de> --- drivers/soc/imx/imx8m-blk-ctrl.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/imx/imx8m-blk-ctrl.c b/drivers/soc/imx/imx8m-blk-ctrl.c index 122f9c884b38..ca63fd30e70a 100644 --- a/drivers/soc/imx/imx8m-blk-ctrl.c +++ b/drivers/soc/imx/imx8m-blk-ctrl.c @@ -99,7 +99,10 @@ static int imx8m_blk_ctrl_power_on(struct generic_pm_domain *genpd) dev_err(bc->dev, "failed to enable clocks\n"); goto bus_put; } - regmap_set_bits(bc->regmap, BLK_CLK_EN, data->clk_mask); + /* As per section 5.2.9.5 of reference manual imx-8MMini-yhsc.pdf, + * enable dispmix sft clock to power on the display + */ + regmap_write(bc->regmap, BLK_CLK_EN, 0x1FFF); /* power up upstream GPC domain */ ret = pm_runtime_get_sync(domain->power_dev); @@ -112,7 +115,7 @@ static int imx8m_blk_ctrl_power_on(struct generic_pm_domain *genpd) udelay(5); /* release reset */ - regmap_set_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask); + regmap_write(bc->regmap, BLK_SFT_RSTN, 0x7F); if (data->mipi_phy_rst_mask) regmap_set_bits(bc->regmap, BLK_MIPI_RESET_DIV, data->mipi_phy_rst_mask); -- 2.20.1
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