Messages in this thread | | | Date | Thu, 12 May 2022 09:09:57 +0200 | Subject | Re: [PATCH v3 19/23] ata: ahci: Add DWC AHCI SATA controller support | From | Hannes Reinecke <> |
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On 5/12/22 01:18, Serge Semin wrote: > Synopsys AHCI SATA controller can work pretty under with the generic > AHCI-platform driver control. But there are vendor-specific peculiarities > which can tune the device performance up and which may need to be fixed up > for proper device functioning. In addition some DWC AHCI-based controllers > may require small platform-specific fixups, so adding them in the generic > AHCI driver would have ruined the code simplicity. Shortly speaking in > order to keep the generic AHCI-platform code clean and have DWC AHCI > SATA-specific features supported we suggest to add a dedicated DWC AHCI > SATA device driver. Aside with the standard AHCI-platform resources > getting, enabling/disabling and the controller registration the new driver > performs the next actions. > > First of all there is a way to verify whether the HBA/ports capabilities > activated in OF are correct. Almost all features availability is reflected > in the vendor-specific parameters registers. So the DWC AHCI driver does > the capabilities sanity check based on the corresponding fields state. > > Secondly if either the Command Completion Coalescing or the Device Sleep > feature is enabled the DWC AHCI-specific internal 1ms timer must be fixed > in accordance with the application clock signal frequency. In particular > the timer value must be set to be Fapp * 1000. Normally the SoC designers > pre-configure the TIMER1MS register to contain a correct value by default. > But the platforms can support the application clock rate change. If that > happens the 1ms timer value must be accordingly updated otherwise the > dependent features won't work as expected. In the DWC AHCI driver we > suggest to rely on the "aclk" reference clock rate to set the timer > interval up. That clock source is supposed to be the AHCI SATA application > clock in accordance with the DT bindings. > > Finally DWC AHCI SATA controller AXI/AHB bus DMA-engine can be tuned up to > transfer up to 1024 * FIFO words at a time by setting the Tx/Rx > transaction size in the DMA control register. The maximum value depends on > the DMA data bus and AXI/AHB bus maximum burst length. In most of the > cases it's better to set the maximum possible value to reach the best AHCI > SATA controller performance. But sometimes in order to improve the system > interconnect responsiveness, transferring in smaller data chunks may be > more preferable. For such cases and for the case when the default value > doesn't provide the best DMA bus performance we suggest to use the new > HBA-port specific DT-properties "snps,{tx,rx}-ts-max" to tune the DMA > transactions size up. > > After all the settings denoted above are handled the DWC AHCI SATA driver > proceeds further with the standard AHCI-platform host initializations. > > Note since DWC AHCI controller is now have a dedicated driver we can > discard the corresponding compatible string from the ahci-platform.c > module. The same concerns "snps,spear-ahci" compatible string, which is > also based on the DWC AHCI IP-core. > > Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> > > --- > > Note there are three more AHCI SATA drivers which have been created for > the devices based on the DWC AHCI SATA IP-core. It's AHCI SunXi, St and > iMX drivers. Mostly they don't support the features implemented in this > driver. So hopefully sometime in future they can be converted to be based > on the generic DWC AHCI SATA driver and just perform some > subvendor-specific setups in their own LLDD (glue) driver code. But for > now let's leave the generic DWC AHCI SATA code as is. Hopefully the new > DWC AHCI-based device drivers will try at least to re-use a part of the > DWC AHCI driver methods if not being able to be integrated in the generic > DWC driver code. > > Changelog v2: > - Change the local objects prefix from 'dwc_ahci_' to 'ahci_dwc_'. > (@Damien) > --- > drivers/ata/Kconfig | 10 + > drivers/ata/Makefile | 1 + > drivers/ata/ahci_dwc.c | 395 ++++++++++++++++++++++++++++++++++++ > drivers/ata/ahci_platform.c | 2 - > 4 files changed, 406 insertions(+), 2 deletions(-) > create mode 100644 drivers/ata/ahci_dwc.c > Reviewed-by: Hannes Reinecke <hare@suse.de>
Cheers,
Hannes -- Dr. Hannes Reinecke Kernel Storage Architect hare@suse.de +49 911 74053 688 SUSE Software Solutions Germany GmbH, Maxfeldstr. 5, 90409 Nürnberg HRB 36809 (AG Nürnberg), GF: Felix Imendörffer
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