Messages in this thread | | | Date | Wed, 21 Dec 2022 13:23:37 +0530 | Subject | Re: [Patch v1 01/10] memory: tegra: add interconnect support for DRAM scaling in Tegra234 | From | Sumit Gupta <> |
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On 20/12/22 23:35, Dmitry Osipenko wrote: > External email: Use caution opening links or attachments > > > 20.12.2022 19:02, Sumit Gupta пишет: >> @@ -779,6 +780,7 @@ const char *const tegra_mc_error_names[8] = { >> */ >> static int tegra_mc_interconnect_setup(struct tegra_mc *mc) >> { >> + struct tegra_icc_node *tnode; >> struct icc_node *node; >> unsigned int i; >> int err; >> @@ -792,7 +794,11 @@ static int tegra_mc_interconnect_setup(struct tegra_mc *mc) >> mc->provider.data = &mc->provider; >> mc->provider.set = mc->soc->icc_ops->set; >> mc->provider.aggregate = mc->soc->icc_ops->aggregate; >> - mc->provider.xlate_extended = mc->soc->icc_ops->xlate_extended; >> + mc->provider.get_bw = mc->soc->icc_ops->get_bw; >> + if (mc->soc->icc_ops->xlate) >> + mc->provider.xlate = mc->soc->icc_ops->xlate; >> + if (mc->soc->icc_ops->xlate_extended) >> + mc->provider.xlate_extended = mc->soc->icc_ops->xlate_extended; > > These IFs look pointless
Ok. Will remove.
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