Messages in this thread | | | From | Geert Uytterhoeven <> | Date | Thu, 17 Nov 2022 12:13:16 +0100 | Subject | Re: [PATCH RFC 3/5] arm64: dts: renesas: r9a07g043[u]: Add IRQC node |
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Hi Prabhakar,
On Mon, Nov 7, 2022 at 6:53 PM Prabhakar <prabhakar.csengg@gmail.com> wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Add IRQC node to R9A07G043 (RZ/G2UL) SoC DTSI. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Thanks for your patch!
> --- > Note, > - clocks and resets are differnt when compared to RZ/Five hence its added > in r9a07g043u.dtsi > - We have additional interrupt on RZ/Five hence interrupts are added in > r9a07g043u.dtsi
Which additional interrupts? Do you already have the r9a06g043f-variant ready, so we can compare?
> - clock-names is also added in r9a07g043u.dtsi to avoid dtbs_check warning
Why does this warn?
> --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi > +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi > @@ -538,6 +538,14 @@ pinctrl: pinctrl@11030000 { > <&cpg R9A07G043_GPIO_SPARE_RESETN>; > }; > > + irqc: interrupt-controller@110a0000 { > + #interrupt-cells = <2>; > + #address-cells = <0>; > + interrupt-controller; > + reg = <0 0x110a0000 0 0x10000>;
The size of the "reg" property will be 0x20000 on RZ/Five, to cover the extra [NIT]MSK registers, so I think this belongs in r9a07g043u.dtsi, too.
> + power-domains = <&cpg>; > + }; > + > dmac: dma-controller@11820000 { > compatible = "renesas,r9a07g043-dmac", > "renesas,rz-dmac";
Gr{oetje,eeting}s,
Geert
-- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
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