Messages in this thread | | | From | Geert Uytterhoeven <> | Date | Thu, 17 Nov 2022 12:09:11 +0100 | Subject | Re: [PATCH RFC 2/5] pinctrl: renesas: rzg2l: Fix configuring the GPIO pins as interrupts |
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Hi Prabhakar,
On Mon, Nov 7, 2022 at 6:53 PM Prabhakar <prabhakar.csengg@gmail.com> wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > On the RZ/G2UL SoC we have less number of pins compared to RZ/G2L and also > the pin configs are completely different. This patch makes sure we use the > appropriate pin configs for each SoC (which is passed as part of the OF > data) while configuring the GPIO pin as interrupts instead of using > rzg2l_gpio_configs[] for all the SoCs. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Thanks for your patch!
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> But I do think there is room for improvement...
> --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c > @@ -127,6 +127,7 @@ struct rzg2l_dedicated_configs { > struct rzg2l_pinctrl_data { > const char * const *port_pins; > const u32 *port_pin_configs; > + unsigned int n_port_pin_configs;
n_ports?
> struct rzg2l_dedicated_configs *dedicated_pins; > unsigned int n_port_pins;
n_port_pins is now always n_port_pin_configs * RZG2L_PINS_PER_PORT, right?
> unsigned int n_dedicated_pins;
> @@ -1517,6 +1518,7 @@ static int rzg2l_pinctrl_probe(struct platform_device *pdev) > static struct rzg2l_pinctrl_data r9a07g043_data = { > .port_pins = rzg2l_gpio_names, > .port_pin_configs = r9a07g043_gpio_configs, > + .n_port_pin_configs = ARRAY_SIZE(r9a07g043_gpio_configs), > .dedicated_pins = rzg2l_dedicated_pins.common, > .n_port_pins = ARRAY_SIZE(r9a07g043_gpio_configs) * RZG2L_PINS_PER_PORT, > .n_dedicated_pins = ARRAY_SIZE(rzg2l_dedicated_pins.common), > @@ -1525,6 +1527,7 @@ static struct rzg2l_pinctrl_data r9a07g043_data = { > static struct rzg2l_pinctrl_data r9a07g044_data = { > .port_pins = rzg2l_gpio_names,
.port_pins is always rzg2l_gpio_names
> .port_pin_configs = rzg2l_gpio_configs, > + .n_port_pin_configs = ARRAY_SIZE(rzg2l_gpio_configs), > .dedicated_pins = rzg2l_dedicated_pins.common, > .n_port_pins = ARRAY_SIZE(rzg2l_gpio_names),
I think this should have become ARRAY_SIZE(rzg2l_gpio_configs) * RZG2L_PINS_PER_PORT) when support for r9a07g043 was introduced.
To avoid overflows when adding support for more SoCs, you can add a bunch of checks like
BUILD_BUG_ON(ARRAY_SIZE(r9a07g043_gpio_configs) * RZG2L_PINS_PER_PORT > ARRAY_SIZE(rzg2l_gpio_names)) BUILD_BUG_ON(ARRAY_SIZE(rzg2l_gpio_configs) * RZG2L_PINS_PER_PORT > ARRAY_SIZE(rzg2l_gpio_names))
> .n_dedicated_pins = ARRAY_SIZE(rzg2l_dedicated_pins.common) +
Gr{oetje,eeting}s,
Geert
-- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
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