Messages in this thread | | | From | Biju Das <> | Subject | RE: [PATCH RFC 2/5] pinctrl: renesas: rzg2l: Fix configuring the GPIO pins as interrupts | Date | Tue, 8 Nov 2022 09:15:58 +0000 |
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> -----Original Message----- > From: Lad, Prabhakar <prabhakar.csengg@gmail.com> > Sent: 08 November 2022 09:10 > To: Biju Das <biju.das.jz@bp.renesas.com> > Cc: Thomas Gleixner <tglx@linutronix.de>; Marc Zyngier <maz@kernel.org>; Rob > Herring <robh+dt@kernel.org>; Krzysztof Kozlowski > <krzysztof.kozlowski+dt@linaro.org>; Geert Uytterhoeven > <geert+renesas@glider.be>; Magnus Damm <magnus.damm@gmail.com>; Linus Walleij > <linus.walleij@linaro.org>; linux-gpio@vger.kernel.org; linux-renesas- > soc@vger.kernel.org; devicetree@vger.kernel.org; linux- > kernel@vger.kernel.org; Prabhakar Mahadev Lad <prabhakar.mahadev- > lad.rj@bp.renesas.com> > Subject: Re: [PATCH RFC 2/5] pinctrl: renesas: rzg2l: Fix configuring the > GPIO pins as interrupts > > Hi Biju, > > On Tue, Nov 8, 2022 at 7:14 AM Biju Das <biju.das.jz@bp.renesas.com> wrote: > > > > Hi Prabhakar, > > > > > > > Subject: [PATCH RFC 2/5] pinctrl: renesas: rzg2l: Fix configuring > > > the GPIO pins as interrupts > > > > > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > > > > On the RZ/G2UL SoC we have less number of pins compared to RZ/G2L > > > and also the pin configs are completely different. This patch makes > > > sure we use the appropriate pin configs for each SoC (which is > > > passed as part of the OF > > > data) while configuring the GPIO pin as interrupts instead of using > > > rzg2l_gpio_configs[] for all the SoCs. > > > > > > > Looks like you are missing fixes tag. > > Fixes: db2e5f21a48ed ("pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain > > to handle GPIO interrupt") > > > I did think about but then I realised this fixes the GPIO IRQ functions only > and we didn't support IRQC and GPIO interrupts up until now so I hadn't added > the fixes tag.
Yep that is true, even though we have pinctrl support for both RZ/G2L and RZ/G2UL. Interrupt support added only for RZ/G2L at that time. Maybe change to reflect RZ/G2UL GPIO interrupt support.
Cheers, Biju
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