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Subject[PATCH 00/10] arm64: Self-hosted trace related erratum workarouds
Date

This series adds CPU erratum work arounds related to the self-hosted
tracing. The list of affected errata handled in this series are :

* TRBE may overwrite trace in FILL mode
- Arm Neoverse-N2 #2139208
- Cortex-A710 #2119858

* A TSB instruction may not flush the trace completely when executed
in trace prohibited region.

- Arm Neoverse-N2 #2067961
- Cortex-A710 #2054223

The series applies on the self-hosted/trbe fixes posted here [0].
A tree containing both the series is available here [1].

[0] https://lkml.kernel.org/r/20210723124456.3828769-1-suzuki.poulose@arm.com
[1] git@git.gitlab.arm.com:linux-arm/linux-skp.git coresight/errata/trbe-tsb-n2-a710/v1


Suzuki K Poulose (10):
coresight: trbe: Add infrastructure for Errata handling
coresight: trbe: Add a helper to calculate the trace generated
coresight: trbe: Add a helper to pad a given buffer area
coresight: trbe: Decouple buffer base from the hardware base
coresight: trbe: Allow driver to choose a different alignment
arm64: Add Neoverse-N2, Cortex-A710 CPU part definition
arm64: Add erratum detection for TRBE overwrite in FILL mode
coresight: trbe: Workaround TRBE errat overwrite in FILL mode
arm64: Enable workaround for TRBE overwrite in FILL mode
arm64: errata: Add workaround for TSB flush failures

Documentation/arm64/silicon-errata.rst | 8 +
arch/arm64/Kconfig | 70 ++++++
arch/arm64/include/asm/barrier.h | 17 +-
arch/arm64/include/asm/cputype.h | 4 +
arch/arm64/kernel/cpu_errata.c | 44 ++++
arch/arm64/tools/cpucaps | 2 +
drivers/hwtracing/coresight/coresight-trbe.c | 227 ++++++++++++++++---
7 files changed, 341 insertions(+), 31 deletions(-)

--
2.24.1

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