Messages in this thread | | | From | Guo Ren <> | Date | Wed, 19 May 2021 14:11:48 +0800 | Subject | Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support |
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On Wed, May 19, 2021 at 2:06 PM Christoph Hellwig <hch@lst.de> wrote: > > On Wed, May 19, 2021 at 02:05:00PM +0800, Guo Ren wrote: > > Since the existing RISC-V ISA cannot solve this problem, it is better > > to provide some configuration for the SOC vendor to customize. > > We've been talking about this problem for close to five years. So no, > if you don't manage to get the feature into the ISA it can't be > supported.
arch/riscv/errata/ is also defined in riscv ISA?
-- Best Regards Guo Ren
ML: https://lore.kernel.org/linux-csky/
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