Messages in this thread | | | From | Guo Ren <> | Date | Wed, 19 May 2021 14:05:00 +0800 | Subject | Re: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support |
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On Wed, May 19, 2021 at 1:20 PM Christoph Hellwig <hch@lst.de> wrote: > > On Wed, May 19, 2021 at 05:04:13AM +0000, guoren@kernel.org wrote: > > From: Guo Ren <guoren@linux.alibaba.com> > > > > The RISC-V ISA doesn't yet specify how to query or modify PMAs, so let > > vendors define the custom properties of memory regions in PTE. > > Err, hell no. The ISA needs to gets this fixed first. Then we can > talk about alternatives patching things in or trapping in the SBI. > But if the RISC-V ISA can't get these basic done after years we can't > support it in Linux at all. This is the lightest solution I could imagine, it avoids conflicts with RISC-V ISA.
Since the existing RISC-V ISA cannot solve this problem, it is better to provide some configuration for the SOC vendor to customize.
-- Best Regards Guo Ren
ML: https://lore.kernel.org/linux-csky/
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