lkml.org 
[lkml]   [2020]   [Dec]   [19]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [PATCH v6 05/11] clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristics
From
Date
Quoting Claudiu Beznea (2020-11-19 07:43:11)
> From: Eugen Hristev <eugen.hristev@microchip.com>
>
> This SoC has the 5th divisor for the mck0 master clock.
> Adapt the characteristics accordingly.
>
> Reported-by: Mihai Sain <mihai.sain@microchip.com>
> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> ---

Applied to clk-next

\
 
 \ /
  Last update: 2020-12-20 00:33    [W:0.100 / U:1.448 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site