Messages in this thread | | | Subject | Re: [PATCH v6 05/11] clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristics | From | Stephen Boyd <> | Date | Sat, 19 Dec 2020 11:53:46 -0800 |
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Quoting Claudiu Beznea (2020-11-19 07:43:11) > From: Eugen Hristev <eugen.hristev@microchip.com> > > This SoC has the 5th divisor for the mck0 master clock. > Adapt the characteristics accordingly. > > Reported-by: Mihai Sain <mihai.sain@microchip.com> > Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> > Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> > ---
Applied to clk-next
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