Messages in this thread | | | Subject | Re: [PATCH v6 03/11] clk: at91: sama7g5: allow SYS and CPU PLLs to be exported and referenced in DT | From | Stephen Boyd <> | Date | Sat, 19 Dec 2020 11:53:33 -0800 |
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Quoting Claudiu Beznea (2020-11-19 07:43:09) > From: Eugen Hristev <eugen.hristev@microchip.com> > > Allow SYSPLL and CPUPLL to be referenced as a PMC_TYPE_CORE clock > from phandle in DT. > > Suggested-by: Claudiu Beznea <claudiu.beznea@microchip.com> > Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> > [claudiu.beznea@microchip.com: adapt commit message, add CPU PLL] > Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> > ---
Applied to clk-next
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