| From | Arnd Bergmann <> | Subject | Re: [PATCH V2 15/15] irqchip: bcm7120-l2: Enable big endian register accesses on BE kernels | Date | Thu, 30 Oct 2014 10:03:16 +0100 |
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On Wednesday 29 October 2014 19:18:08 Kevin Cernekee wrote: > > + flags = IRQ_GC_INIT_MASK_CACHE; > + if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) > + flags |= IRQ_GC_BE_IO; > + >
As I said before, I think you should take this from a DT property instead of making it dependent on the CPU endianess. Otherwise things go horribly wrong e.g. when someone runs a big-endian kernel on one of the ARM based chips.
Arnd
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