Messages in this thread | | | Date | Tue, 9 Apr 2024 22:26:59 -0700 | From | Ira Weiny <> | Subject | Re: [PATCH 13/26] cxl/mem: Configure dynamic capacity interrupts |
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Dave Jiang wrote: > > > On 3/24/24 4:18 PM, ira.weiny@intel.com wrote: > > From: Navneet Singh <navneet.singh@intel.com> > > > > Dynamic Capacity Devices (DCD) support extent change notifications > > through the event log mechanism. The interrupt mailbox commands were > > extended in CXL 3.1 to support these notifications. > > > > Firmware can't configure DCD events to be FW controlled but can retain > > control of memory events. Split irq configuration of memory events and > > DCD events to allow for FW control of memory events while DCD is host > > controlled. > > > > Configure DCD event log interrupts on devices supporting dynamic > > capacity. Disable DCD if interrupts are not supported. > > > > Signed-off-by: Navneet Singh <navneet.singh@intel.com> > > Co-developed-by: Ira Weiny <ira.weiny@intel.com> > > Signed-off-by: Ira Weiny <ira.weiny@intel.com> > > A few minor comments. The rest LGTM. > > > > --- > > Changes for v1 > > [iweiny: rebase to upstream irq code] > > [iweiny: disable DCD if irqs not supported] > > --- > > drivers/cxl/core/mbox.c | 9 ++++++- > > drivers/cxl/cxl.h | 4 ++- > > drivers/cxl/cxlmem.h | 4 +++ > > drivers/cxl/pci.c | 71 ++++++++++++++++++++++++++++++++++++++++--------- > > 4 files changed, 74 insertions(+), 14 deletions(-) > > > > diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c > > index 14e8a7528a8b..58b31fa47b93 100644 > > --- a/drivers/cxl/core/mbox.c > > +++ b/drivers/cxl/core/mbox.c > > @@ -1323,10 +1323,17 @@ static int cxl_get_dc_config(struct cxl_memdev_state *mds, u8 start_region, > > return rc; > > } > > > > -static bool cxl_dcd_supported(struct cxl_memdev_state *mds) > > +bool cxl_dcd_supported(struct cxl_memdev_state *mds) > > { > > return test_bit(CXL_DCD_ENABLED_GET_CONFIG, mds->dcd_cmds); > > } > > +EXPORT_SYMBOL_NS_GPL(cxl_dcd_supported, CXL); > > + > > +void cxl_disable_dcd(struct cxl_memdev_state *mds) > > +{ > > + clear_bit(CXL_DCD_ENABLED_GET_CONFIG, mds->dcd_cmds); > > +} > > +EXPORT_SYMBOL_NS_GPL(cxl_disable_dcd, CXL); > > Should these one-liners just go into a header file?
Yea they could.
> > > > > /** > > * cxl_dev_dynamic_capacity_identify() - Reads the dynamic capacity > > diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h > > index 15d418b3bc9b..d585f5fdd3ae 100644 > > --- a/drivers/cxl/cxl.h > > +++ b/drivers/cxl/cxl.h > > @@ -164,11 +164,13 @@ static inline int ways_to_eiw(unsigned int ways, u8 *eiw) > > #define CXLDEV_EVENT_STATUS_WARN BIT(1) > > #define CXLDEV_EVENT_STATUS_FAIL BIT(2) > > #define CXLDEV_EVENT_STATUS_FATAL BIT(3) > > +#define CXLDEV_EVENT_STATUS_DCD BIT(4) > > extra tab?
It does not look like it on my end... :-/
#define CXLDEV_DEV_EVENT_STATUS_OFFSET>->-------0x00$ #define CXLDEV_EVENT_STATUS_INFO>------->-------BIT(0)$ #define CXLDEV_EVENT_STATUS_WARN>------->-------BIT(1)$ #define CXLDEV_EVENT_STATUS_FAIL>------->-------BIT(2)$ #define CXLDEV_EVENT_STATUS_FATAL>------>-------BIT(3)$ #define CXLDEV_EVENT_STATUS_DCD>>------->-------BIT(4)$
Ira
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