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SubjectRe: [PATCH V3 0/7] drm: bridge: samsung-dsim: Support variable clocking
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On 02.05.2023 03:07, Adam Ford wrote:
> This series fixes the blanking pack size and the PMS calculation. It then
> adds support to allows the DSIM to dynamically DPHY clocks, and support
> non-burst mode while allowing the removal of the hard-coded clock values
> for the PLL for imx8m mini/nano/plus, and it allows the removal of the
> burst-clock device tree entry when burst-mode isn't supported by connected
> devices like an HDMI brige. In that event, the HS clock is set to the value
> requested by the bridge chip.
>
> This has been tested on both an i.MX8M Nano and i.MX8M Plus, and should work
> on i.MX8M Mini as well.
>
> Adam Ford (6):
> drm: bridge: samsung-dsim: Fix PMS Calculator on imx8m[mnp]
> drm: bridge: samsung-dsim: Fetch pll-clock-frequency automatically
> drm: bridge: samsung-dsim: Select GENERIC_PHY_MIPI_DPHY
> drm: bridge: samsung-dsim: Dynamically configure DPHY timing
> drm: bridge: samsung-dsim: Support non-burst mode
> drm: bridge: samsung-dsim: Let blanking calcuation work in non-burst
> mode
>
> Lucas Stach (1):
> drm: bridge: samsung-dsim: fix blanking packet size calculation
>
> drivers/gpu/drm/bridge/Kconfig | 1 +
> drivers/gpu/drm/bridge/samsung-dsim.c | 150 ++++++++++++++++++++++----
> include/drm/bridge/samsung-dsim.h | 5 +
> 3 files changed, 136 insertions(+), 20 deletions(-)

Works fine (= doesn't break) on Exynos.

Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>


>
> ---
> V3: When checking if the bust-clock is present, only check for it
> in the device tree, and don't check the presence of the
> MIPI_DSI_MODE_VIDEO_BURST flag as it breaks an existing Exynos
> board.
>
> Add a new patch to the series to select GENERIC_PHY_MIPI_DPHY in
> Kconfig otherwise the build breaks on the 32-bit Exynos.
>
> Change vco_min variable name to min_freq
>
> Added tested-by from Chen-Yu Tsai
>
> V2: Instead of using my packet blanking calculation, this integrates
> on from Lucas Stach which gets modified later in the series to
> cache the value of the HS-clock instead of having to do the
> calucations again.
>
> Instead of completely eliminating the PLL clock frequency from
> the device tree, this makes it optional to avoid breaking some
> Samsung devices. When the samsung,pll-clock-frequency is not
> found, it reads the value of the clock named "sclk_mipi"
> This also maintains backwords compatibility with older device
> trees.
>
> This also changes the DPHY calcuation from a Look-up table,
> a reverse engineered algorithm which uses
> phy_mipi_dphy_get_default_config to determine the standard
> nominal values and calculates the cycles necessary to update
> the DPHY timings accordingly.
>

Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland

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