Messages in this thread | | | From | Pierre Gondois <> | Subject | [PATCH v3 0/4] cacheinfo: Correctly fallback to using clidr_el1's information | Date | Thu, 13 Apr 2023 11:14:30 +0200 |
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v3: cacheinfo: Check sib_leaf in cache_leaves_are_shared(): - Reformulate commit message - Fix rebase issue and move '&&' condition which was in the last patch to this patch. cacheinfo: Add use_arch[|_cache]_info field/function: - Put the function declaration in one line. arch_topology: Remove early cacheinfo error message: - New patch.
v2: cacheinfo: Check sib_leaf in cache_leaves_are_shared() - Reformulate commit message - Add 'Fixes: f16d1becf96f ("cacheinfo: Use cache identifiers [...]' cacheinfo: Check cache properties are present in DT - Use of_property_present() - Add 'Reported-by: Alexandre Ghiti <alexghiti@rivosinc.com>' cacheinfo: Add use_arch[|_cache]_info field/function: - Make use_arch_cache_info() a static inline function
The cache information can be extracted from either a Device Tree (DT), the PPTT ACPI table, or arch registers (clidr_el1 for arm64).
When the DT is used but no cache properties are advertised, the current code doesn't correctly fallback to using arch information.
Correct this. Also use the assumption that L1 data/instruction caches are private and L2/higher caches are shared when the cache information is coming form clidr_el1.
As suggested by Alexandre, this serie should ideally go to 6.3 fixes.
Pierre Gondois (4): cacheinfo: Check sib_leaf in cache_leaves_are_shared() cacheinfo: Check cache properties are present in DT arch_topology: Remove early cacheinfo error message cacheinfo: Add use_arch[|_cache]_info field/function
drivers/base/arch_topology.c | 4 +-- drivers/base/cacheinfo.c | 48 +++++++++++++++++++++++++++++++++--- include/linux/cacheinfo.h | 10 ++++++++ 3 files changed, 55 insertions(+), 7 deletions(-)
-- 2.25.1
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