Messages in this thread Patch in this message | | | From | Tony Luck <> | Subject | [PATCH] x86/resctrl: Fix unused variable warning in cache_alloc_hsw_probe() | Date | Tue, 31 Oct 2023 15:05:34 -0700 |
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In a "W=1" build gcc throws a warning:
arch/x86/kernel/cpu/resctrl/core.c: In function ‘cache_alloc_hsw_probe’: arch/x86/kernel/cpu/resctrl/core.c:139:16: warning: variable ‘h’ set but not used
Fix by switching from rdmsr() to rdmsrl() using a single u64 argument for the MSR value instead of the pair of u32 for the high and low halves.
Signed-off-by: Tony Luck <tony.luck@intel.com> --- This has been annoying me for a while as the only warning from the resctrl code when building with W=1.
N.B. compile tested only. I don't have a Haswell system to check this works.
arch/x86/kernel/cpu/resctrl/core.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c index 19e0681f0435..4084131d391d 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -136,15 +136,16 @@ static inline void cache_alloc_hsw_probe(void) { struct rdt_hw_resource *hw_res = &rdt_resources_all[RDT_RESOURCE_L3]; struct rdt_resource *r = &hw_res->r_resctrl; - u32 l, h, max_cbm = BIT_MASK(20) - 1; + u32 max_cbm = BIT_MASK(20) - 1; + u64 l3_cbm_0; if (wrmsr_safe(MSR_IA32_L3_CBM_BASE, max_cbm, 0)) return; - rdmsr(MSR_IA32_L3_CBM_BASE, l, h); + rdmsrl(MSR_IA32_L3_CBM_BASE, l3_cbm_0); /* If all the bits were set in MSR, return success */ - if (l != max_cbm) + if (l3_cbm_0 != max_cbm) return; hw_res->num_closid = 4; -- 2.41.0
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