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SubjectNXP imx6ull nonalignment buffer question
Hi Haibo

Working on imx6ulz design and found that if I send a sdio packet using
the sdio_writesb the adma driver tries to handle it with two dma
descriptors. The first one filled with the bytes up to 3 to cover the
misalign and then another buffer descriptor

offset = (SDHCI_ADMA2_ALIGN - (addr & SDHCI_ADMA2_MASK)) &
SDHCI_ADMA2_MASK;
if (offset) {
if (data->flags & MMC_DATA_WRITE) {
buffer = sdhci_kmap_atomic(sg);
memcpy(align, buffer, offset);
sdhci_kunmap_atomic(buffer);
}

/* tran, valid */
__sdhci_adma_write_desc(host, &desc, align_addr,
offset, ADMA2_TRAN_VALID);

BUG_ON(offset > 65536);

align += SDHCI_ADMA2_ALIGN;
align_addr += SDHCI_ADMA2_ALIGN;

addr += offset;
len -= offset;
}

In 48.7.4 Data Length Setting
For either ADMA (ADMA1 or ADMA2) transfer, the data in the data buffer must be
word aligned, so the data length set in the descriptor must be a
multiple of 4. I have noticed that this code does not work as
expected.

Did you have any feedback?

Michael

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