Messages in this thread | | | Date | Mon, 9 Jan 2023 09:39:07 +0530 | Subject | Re: [PATCH v7 2/8] arm64: dts: ti: k3-j721s2-main: Add SERDES and WIZ device tree node | From | Vignesh Raghavendra <> |
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On 22/11/22 15:46, Matt Ranostay wrote: > +#include <dt-bindings/phy/phy-cadence.h> > +#include <dt-bindings/phy/phy-ti.h> > + > +/ { > + serdes_refclk: clock-cmnrefclk { > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <0>; > + }; > +}; > + > &cbass_main { > msmc_ram: sram@70000000 { > compatible = "mmio-sram"; > @@ -38,6 +49,13 @@ usb_serdes_mux: mux-controller-0 { > #mux-control-cells = <1>; > mux-reg-masks = <0x0 0x8000000>; /* USB0 to SERDES0 lane 1/3 mux */ > }; > + > + serdes_ln_ctrl: mux-controller-80 {
Same as previous patch:
+/workdir/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dtb: syscon@104000: 'mux-controller-0', 'mux-controller-80' do not match any of the regexes: '^clock-controller@[0-9a-f]+$', '^mux-controller@[0-9a-f]+$', 'phy@[0-9a-f]+$', 'pinctrl-[0-9]+'
> + compatible = "mmio-mux"; > + #mux-control-cells = <1>; > + mux-reg-masks = <0x80 0x3>, <0x84 0x3>, /* SERDES0 lane0/1 select */ > + <0x88 0x3>, <0x8c 0x3>; /* SERDES0 lane2/3 select */ > + }; > };
[...]
-- Regards Vignesh
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