Messages in this thread Patch in this message | | | Date | Thu, 07 Jul 2022 08:15:51 -0000 | From | "irqchip-bot for Alexandre Torgue" <> | Subject | [irqchip: irq/irqchip-next] irqchip/stm32-exti: Tag emr register as undefined for stm32mp15 |
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The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: b38040f0167d25092e813c8d1a70cf2708c1720b Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/b38040f0167d25092e813c8d1a70cf2708c1720b Author: Alexandre Torgue <alexandre.torgue@foss.st.com> AuthorDate: Mon, 06 Jun 2022 18:27:55 +02:00 Committer: Marc Zyngier <maz@kernel.org> CommitterDate: Thu, 07 Jul 2022 09:07:44 +01:00
irqchip/stm32-exti: Tag emr register as undefined for stm32mp15
The reference manual RM0436 of stm32mp15 till version v4.0 was erroneously reporting the Event Mask Registers (EMR) for the Cortex-A CPUs. These registers have been removed from v5.0 of the manual and the corresponding offsets have been marked as 'Reserved'.
Prevent accessing these reserved addresses by tagging the EMR offsets as UNDEF_REG and modifying the code to handle this case.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220606162757.415354-5-antonio.borneo@foss.st.com --- drivers/irqchip/irq-stm32-exti.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c index e2722e4..e8fa91b 100644 --- a/drivers/irqchip/irq-stm32-exti.c +++ b/drivers/irqchip/irq-stm32-exti.c @@ -132,7 +132,7 @@ static const struct stm32_exti_drv_data stm32h7xx_drv_data = { static const struct stm32_exti_bank stm32mp1_exti_b1 = { .imr_ofst = 0x80, - .emr_ofst = 0x84, + .emr_ofst = UNDEF_REG, .rtsr_ofst = 0x00, .ftsr_ofst = 0x04, .swier_ofst = 0x08, @@ -142,7 +142,7 @@ static const struct stm32_exti_bank stm32mp1_exti_b1 = { static const struct stm32_exti_bank stm32mp1_exti_b2 = { .imr_ofst = 0x90, - .emr_ofst = 0x94, + .emr_ofst = UNDEF_REG, .rtsr_ofst = 0x20, .ftsr_ofst = 0x24, .swier_ofst = 0x28, @@ -152,7 +152,7 @@ static const struct stm32_exti_bank stm32mp1_exti_b2 = { static const struct stm32_exti_bank stm32mp1_exti_b3 = { .imr_ofst = 0xA0, - .emr_ofst = 0xA4, + .emr_ofst = UNDEF_REG, .rtsr_ofst = 0x40, .ftsr_ofst = 0x44, .swier_ofst = 0x48, @@ -795,7 +795,8 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data, * clear registers to avoid residue */ writel_relaxed(0, base + stm32_bank->imr_ofst); - writel_relaxed(0, base + stm32_bank->emr_ofst); + if (stm32_bank->emr_ofst != UNDEF_REG) + writel_relaxed(0, base + stm32_bank->emr_ofst); pr_info("%pOF: bank%d\n", node, bank_idx);
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