Messages in this thread | | | From | Arnd Bergmann <> | Date | Tue, 3 May 2022 12:45:47 +0200 | Subject | Re: [PATCH v6 7/8] ARM: dts: Introduce HPE GXP Device tree |
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On Mon, May 2, 2022 at 10:40 PM <nick.hawkins@hpe.com> wrote:
> --- /dev/null > +++ b/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts > @@ -0,0 +1,13 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Device Tree file for HPE DL360Gen10 > + */ > + > +/include/ "hpe-gxp.dtsi" > + > +/ { > + #address-cells = <1>; > + #size-cells = <1>; > + compatible = "hpe,gxp-dl360gen10","hpe,gxp"; > + model = "Hewlett Packard Enterprise ProLiant dl360 Gen10"; > +};
In the board specific file, you normally have "aliases", "chosen" and "memory" nodes that define e.g. which uart is used for the console.
> diff --git a/arch/arm/boot/dts/hpe-gxp.dtsi b/arch/arm/boot/dts/hpe-gxp.dtsi > new file mode 100644 > index 000000000000..7a99e174e4b3 > --- /dev/null > +++ b/arch/arm/boot/dts/hpe-gxp.dtsi > @@ -0,0 +1,132 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Device Tree file for HPE GXP > + */ > + > +/dts-v1/; > +/ { > + model = "Hewlett Packard Enterprise GXP BMC"; > + compatible = "hpe,gxp", "hpe,gxp-dl360gen10";
I think "hpe,gxp-dl360gen10" is misplaced here, if that is the identifier of a particular machine rather than the SoC.
> + memory@40000000 { > + device_type = "memory"; > + reg = <0x40000000 0x20000000>; > + };
If the memory is outside of the SoC, it should not be here.
> + axi { > + compatible = "simple-bus"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + dma-ranges; > + > + L2: cache-controller@b0040000 { > + compatible = "arm,pl310-cache"; > + reg = <0xb0040000 0xFFC>; > + cache-unified; > + cache-level = <2>; > + };
The length of the register area looks wrong, this is usually the full 4KB area, rather than leaving out the last four bytes.
Arnd
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