Messages in this thread Patch in this message | | | From | Adam Ford <> | Subject | [PATCH 2/5] arm64: dts: imx8mn: Enable HS400-ES | Date | Sun, 27 Mar 2022 07:38:31 -0500 |
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The SDHC controller in the imx8mn has the same controller as the imx8mm which supports HS400-ES. Change the compatible fallback to imx8mm to enable it.
Signed-off-by: Adam Ford <aford173@gmail.com> --- arch/arm64/boot/dts/freescale/imx8mn.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index 99f0f5026674..959285c3fee0 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -933,7 +933,7 @@ mu: mailbox@30aa0000 { }; usdhc1: mmc@30b40000 { - compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc"; + compatible = "fsl,imx8mn-usdhc", "fsl,imx8mm-usdhc"; reg = <0x30b40000 0x10000>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MN_CLK_IPG_ROOT>, @@ -947,7 +947,7 @@ usdhc1: mmc@30b40000 { }; usdhc2: mmc@30b50000 { - compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc"; + compatible = "fsl,imx8mn-usdhc", "fsl,imx8mm-usdhc"; reg = <0x30b50000 0x10000>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MN_CLK_IPG_ROOT>, @@ -961,7 +961,7 @@ usdhc2: mmc@30b50000 { }; usdhc3: mmc@30b60000 { - compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc"; + compatible = "fsl,imx8mn-usdhc", "fsl,imx8mm-usdhc"; reg = <0x30b60000 0x10000>; interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MN_CLK_IPG_ROOT>, -- 2.34.1
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