Messages in this thread Patch in this message | | | From | Adam Ford <> | Subject | [PATCH 3/5] arm64: dts: imx8mp: Enable HS400-ES | Date | Sun, 27 Mar 2022 07:38:32 -0500 |
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The SDHC controller in the imx8mp has the same controller as the imx8mm which supports HS400-ES. Change the compatible fallback to imx8mm to enable it.
Signed-off-by: Adam Ford <aford173@gmail.com> --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 794d75173cf5..d5ee1520f1fe 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -769,7 +769,7 @@ i2c6: i2c@30ae0000 { }; usdhc1: mmc@30b40000 { - compatible = "fsl,imx8mp-usdhc", "fsl,imx7d-usdhc"; + compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc"; reg = <0x30b40000 0x10000>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MP_CLK_DUMMY>, @@ -783,7 +783,7 @@ usdhc1: mmc@30b40000 { }; usdhc2: mmc@30b50000 { - compatible = "fsl,imx8mp-usdhc", "fsl,imx7d-usdhc"; + compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc"; reg = <0x30b50000 0x10000>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MP_CLK_DUMMY>, @@ -797,7 +797,7 @@ usdhc2: mmc@30b50000 { }; usdhc3: mmc@30b60000 { - compatible = "fsl,imx8mp-usdhc", "fsl,imx7d-usdhc"; + compatible = "fsl,imx8mp-usdhc", "fsl,imx8mm-usdhc"; reg = <0x30b60000 0x10000>; interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MP_CLK_DUMMY>, -- 2.34.1
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