| Date | Mon, 21 Feb 2022 08:44:35 +0100 | From | Michael Walle <> | Subject | Re: [PATCH 0/4] spi-mem: Allow specifying the byte order in DTR mode |
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Am 2022-02-18 15:58, schrieb Tudor Ambarus: > Fortunately there are controllers > that can swap back the bytes at runtime, fixing the endiannesses. > Provide > a way for the upper layers to specify the byte order in DTR mode.
Are there any patches for the atmel-quadspi yet? What happens if the controller doesn't support it? Will there be a software fallback?
-michael
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