Messages in this thread | | | Date | Wed, 16 Feb 2022 00:43:18 +0530 | From | Pratyush Yadav <> | Subject | Re: [PATCH v1 07/14] mtd: spi-nor: move all micron-st specifics into micron-st.c |
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On 02/02/22 03:58PM, Michael Walle wrote: > The flag status register is only available on micron flashes. Move all > the functions around that into the micron module. > > This is almost a mechanical move except for the spi_nor_fsr_ready() > which now also checks the normal status register. Previously, this was > done in spi_nor_ready(). > > Signed-off-by: Michael Walle <michael@walle.cc> > --- > drivers/mtd/spi-nor/core.c | 123 +----------------------------- > drivers/mtd/spi-nor/micron-st.c | 129 ++++++++++++++++++++++++++++++++ > include/linux/mtd/spi-nor.h | 8 -- > 3 files changed, 130 insertions(+), 130 deletions(-) > [...] > diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c > index bb95b1aabf74..c66580e8aa00 100644 > --- a/drivers/mtd/spi-nor/micron-st.c > +++ b/drivers/mtd/spi-nor/micron-st.c > @@ -8,6 +8,8 @@ > > #include "core.h" > > +#define SPINOR_OP_RDFSR 0x70 /* Read flag status register */ > +#define SPINOR_OP_CLFSR 0x50 /* Clear flag status register */ > #define SPINOR_OP_MT_DTR_RD 0xfd /* Fast Read opcode in DTR mode */ > #define SPINOR_OP_MT_RD_ANY_REG 0x85 /* Read volatile register */ > #define SPINOR_OP_MT_WR_ANY_REG 0x81 /* Write volatile register */ > @@ -17,6 +19,12 @@ > #define SPINOR_MT_OCT_DTR 0xe7 /* Enable Octal DTR. */ > #define SPINOR_MT_EXSPI 0xff /* Enable Extended SPI (default) */ > > +/* Flag Status Register bits */ > +#define FSR_READY BIT(7) /* Device status, 0 = Busy, 1 = Ready */ > +#define FSR_E_ERR BIT(5) /* Erase operation status */ > +#define FSR_P_ERR BIT(4) /* Program operation status */ > +#define FSR_PT_ERR BIT(1) /* Protection error bit */ > + > static int spi_nor_micron_octal_dtr_enable(struct spi_nor *nor, bool enable) > { > struct spi_mem_op op; > @@ -273,12 +281,133 @@ static int st_micron_set_4byte_addr_mode(struct spi_nor *nor, bool enable) > return spi_nor_write_disable(nor); > } > > +/** > + * spi_nor_read_fsr() - Read the Flag Status Register. > + * @nor: pointer to 'struct spi_nor' > + * @fsr: pointer to a DMA-able buffer where the value of the > + * Flag Status Register will be written. Should be at least 2 > + * bytes. > + * > + * Return: 0 on success, -errno otherwise. > + */ > +static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr) > +{ > + int ret; > + > + if (nor->spimem) { > + struct spi_mem_op op = > + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDFSR, 0), > + SPI_MEM_OP_NO_ADDR, > + SPI_MEM_OP_NO_DUMMY, > + SPI_MEM_OP_DATA_IN(1, fsr, 0)); > + > + if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR) { > + op.addr.nbytes = nor->params->rdsr_addr_nbytes; > + op.dummy.nbytes = nor->params->rdsr_dummy; > + /* > + * We don't want to read only one byte in DTR mode. So, > + * read 2 and then discard the second byte. > + */ > + op.data.nbytes = 2; > + } > + > + spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); > + > + ret = spi_mem_exec_op(nor->spimem, &op); > + } else { > + ret = spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDFSR, fsr, > + 1); > + } > + > + if (ret) > + dev_dbg(nor->dev, "error %d reading FSR\n", ret); > + > + return ret; > +} > + > +/** > + * spi_nor_clear_fsr() - Clear the Flag Status Register. > + * @nor: pointer to 'struct spi_nor'. > + */ > +static void spi_nor_clear_fsr(struct spi_nor *nor) > +{ > + int ret; > + > + if (nor->spimem) { > + struct spi_mem_op op = > + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CLFSR, 0), > + SPI_MEM_OP_NO_ADDR, > + SPI_MEM_OP_NO_DUMMY, > + SPI_MEM_OP_NO_DATA); > + > + spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); > + > + ret = spi_mem_exec_op(nor->spimem, &op); > + } else { > + ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_CLFSR, > + NULL, 0); > + } > + > + if (ret) > + dev_dbg(nor->dev, "error %d clearing FSR\n", ret); > +} > + > +/** > + * spi_nor_fsr_ready() - Query the Flag Status Register to see if the flash is > + * ready for new commands. > + * @nor: pointer to 'struct spi_nor'. > + * > + * Return: 1 if ready, 0 if not ready, -errno on errors. > + */ > +static int spi_nor_fsr_ready(struct spi_nor *nor)
Nitpick: At this point this function is not just spi_nor_fsr_ready(). I think it should be renamed to something more accurate like micron_st_ready() (with whatever prefix scheme that was decided upon).
Looks good otherwise.
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
-- Regards, Pratyush Yadav Texas Instruments Inc.
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