Messages in this thread | | | From | Bjorn Andersson <> | Subject | Re: (subset) [PATCH v2 00/10] interconnect: osm-l3: SC8280XP L3 and DDR scaling | Date | Tue, 6 Dec 2022 12:19:28 -0600 |
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On Thu, 10 Nov 2022 19:25:05 -0800, Bjorn Andersson wrote: > The SC8280XP currently shows depressing results in memory benchmarks. > Fix this by introducing support for the platform in the OSM (and EPSS) > L3 driver and support for the platform in the bwmon binding. > > Then add the necessary nodes and values throughout the sc8280xp and > sa8540p dtsi files to make the various devices on these platforms scale > both L3, memory bus and DDR. > > [...]
Applied, thanks!
[06/10] arm64: dts: qcom: Align with generic osm-l3/epss-l3 commit: a0289a1040a557428a65d099dfdebe80f1a0d0eb [07/10] arm64: dts: qcom: sc8280xp: Add epss_l3 node commit: e4f68d6c32aec8f3c7cdb07d18278e9a068a7eb0 [08/10] arm64: dts: qcom: sc8280xp: Set up L3 scaling commit: 33ba07ffd30a1da6f10995ef0a6ec51e17c84f31 [10/10] arm64: dts: qcom: sc8280xp: Add bwmon instances commit: 64ebe7fc473fb3a7d67b73a2faa0a10cb322cdce
Best regards, -- Bjorn Andersson <andersson@kernel.org>
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