Messages in this thread | | | From | Conor Dooley <> | Subject | [PATCH v1 0/3] Putting some basic order on isa extension lists | Date | Wed, 30 Nov 2022 23:41:23 +0000 |
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From: Conor Dooley <conor.dooley@microchip.com>
I don't know for sure that I have not re-ordered something that is sacrosanct. It seems that all of these are internal use structs, and should be okay, barring the obvious exception of the, intentionally re-ordered, isa_ext_arr.
With that caveat out of the way - all I did here was try to make things consistent so that it'd be easier to point patch submitters at a "do this order please".
I never know which of these can be moved without breaking stuff - but they all seem to be internal use stuff since they're not in uapi?
For v2, I added another path with some uapi docs & switched to Drew's suggested ordering of alphabetically, except in the /proc/cpuinfo array, as per the discussion today in the pw-sync call. I also added a sprinkling of comments around which things should be sorted in which way.
I guess consider this an RFS, with the S being Screaming in the case of me doing something you abhor :)
Thanks, Conor.
CC: ajones@ventanamicro.com CC: aou@eecs.berkeley.edu CC: conor@kernel.org CC: conor.dooley@microchip.com CC: corbet@lwn.net CC: guoren@kernel.org CC: heiko@sntech.de CC: palmer@dabbelt.com CC: paul.walmsley@sifive.com
CC: linux-kernel@vger.kernel.org CC: linux-riscv@lists.infradead.org CC: linux-doc@vger.kernel.org
Conor Dooley (3): RISC-V: clarify ISA string ordering rules in cpu.c RISC-V: resort all extensions in consistent orders Documentation: riscv: add a section about ISA string ordering in /proc/cpuinfo
Documentation/riscv/uabi.rst | 42 +++++++++++++++++++++++++++ arch/riscv/include/asm/hwcap.h | 12 ++++---- arch/riscv/kernel/cpu.c | 53 ++++++++++++++++++++++++---------- arch/riscv/kernel/cpufeature.c | 6 ++-- 4 files changed, 91 insertions(+), 22 deletions(-)
-- 2.38.1
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