Messages in this thread | | | Date | Mon, 8 Feb 2021 23:49:54 +0530 | From | Manivannan Sadhasivam <> | Subject | Re: [PATCH v3 0/5] Add APCS support for SDX55 |
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On Mon, Feb 08, 2021 at 09:46:11AM -0800, Stephen Boyd wrote: > Quoting Manivannan Sadhasivam (2021-01-17 20:11:51) > > Changes in v2: > > > > * Modified the max_register value as per the SDX55 IPC offset in mailbox > > driver. > > > > Manivannan Sadhasivam (5): > > dt-bindings: mailbox: Add binding for SDX55 APCS > > mailbox: qcom: Add support for SDX55 APCS IPC > > I think I can apply the clk patches to clk tree without the mailbox > patches, right? >
Yes, you can. Thanks for applying!
Jassi: Can you please look into the mailbox patches?
Regards, Mani
> > dt-bindings: clock: Add Qualcomm A7 PLL binding > > clk: qcom: Add A7 PLL support > > clk: qcom: Add SDX55 APCS clock controller support > >
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