Quoting Manivannan Sadhasivam (2021-01-17 20:11:54)> Add devicetree YAML binding for Cortex A7 PLL clock in Qualcomm> platforms like SDX55.> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>> ---Applied to clk-next