Messages in this thread | ![/](/images/icornerl.gif) | | Date | Wed, 20 Jan 2021 09:50:18 -0600 | From | Rob Herring <> | Subject | Re: [PATCH v3 3/5] dt-bindings: clock: Add Qualcomm A7 PLL binding |
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On Mon, 18 Jan 2021 09:41:54 +0530, Manivannan Sadhasivam wrote: > Add devicetree YAML binding for Cortex A7 PLL clock in Qualcomm > platforms like SDX55. > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > .../devicetree/bindings/clock/qcom,a7pll.yaml | 51 +++++++++++++++++++ > 1 file changed, 51 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,a7pll.yaml >
Please add Acked-by/Reviewed-by tags when posting new versions. However, there's no need to repost patches *only* to add the tags. The upstream maintainer will do that for acks received on the version they apply.
If a tag was not added on purpose, please state why and what changed.
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