Messages in this thread Patch in this message | | | From | Greentime Hu <> | Subject | [PATCH v9 14/17] riscv: Use CSR_STATUS to replace sstatus in vector.S | Date | Tue, 9 Nov 2021 17:48:26 +0800 |
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It should use the same logic here in both m-mode and s-mode.
Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Co-developed-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Vincent Chen <vincent.chen@sifive.com> --- arch/riscv/kernel/vector.S | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/kernel/vector.S b/arch/riscv/kernel/vector.S index a973532d2e7f..1a79e2485bfa 100644 --- a/arch/riscv/kernel/vector.S +++ b/arch/riscv/kernel/vector.S @@ -31,7 +31,7 @@ ENTRY(__vstate_save) li status, SR_VS - csrs sstatus, status + csrs CSR_STATUS, status csrr x_vstart, CSR_VSTART csrr x_vtype, CSR_VTYPE @@ -51,13 +51,13 @@ ENTRY(__vstate_save) REG_S x_vl, RISCV_V_STATE_VL(vstatep) REG_S x_vcsr, RISCV_V_STATE_VCSR(vstatep) - csrc sstatus, status + csrc CSR_STATUS, status ret ENDPROC(__vstate_save) ENTRY(__vstate_restore) li status, SR_VS - csrs sstatus, status + csrs CSR_STATUS, status vsetvli incr, x0, e8, m8 vle8.v v0, (datap) @@ -76,7 +76,7 @@ ENTRY(__vstate_restore) csrw CSR_VSTART, x_vstart csrw CSR_VCSR, x_vcsr - csrc sstatus, status + csrc CSR_STATUS, status ret ENDPROC(__vstate_restore) -- 2.31.1
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