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    SubjectRe: [PATCH v9 08/17] riscv: Add vector struct and assembler definitions
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    On Tue, 09 Nov 2021 01:48:20 PST (-0800), greentime.hu@sifive.com wrote:
    > Add vector state context struct in struct thread and asm-offsets.c
    > definitions.
    >
    > The vector registers will be saved in datap pointer of __riscv_v_state. It
    > will be dynamically allocated in kernel space. It will be put right after
    > the __riscv_v_state data structure in user space.
    >
    > Co-developed-by: Vincent Chen <vincent.chen@sifive.com>
    > Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
    > Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
    > ---
    > arch/riscv/include/asm/processor.h | 1 +
    > arch/riscv/include/uapi/asm/ptrace.h | 11 +++++++++++
    > arch/riscv/kernel/asm-offsets.c | 6 ++++++
    > 3 files changed, 18 insertions(+)
    >
    > diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h
    > index 46b492c78cbb..a268f1382e52 100644
    > --- a/arch/riscv/include/asm/processor.h
    > +++ b/arch/riscv/include/asm/processor.h
    > @@ -35,6 +35,7 @@ struct thread_struct {
    > unsigned long s[12]; /* s[0]: frame pointer */
    > struct __riscv_d_ext_state fstate;
    > unsigned long bad_cause;
    > + struct __riscv_v_state vstate;
    > };
    >
    > /* Whitelist the fstate from the task_struct for hardened usercopy */
    > diff --git a/arch/riscv/include/uapi/asm/ptrace.h b/arch/riscv/include/uapi/asm/ptrace.h
    > index 882547f6bd5c..bd3b8a710246 100644
    > --- a/arch/riscv/include/uapi/asm/ptrace.h
    > +++ b/arch/riscv/include/uapi/asm/ptrace.h
    > @@ -77,6 +77,17 @@ union __riscv_fp_state {
    > struct __riscv_q_ext_state q;
    > };
    >
    > +struct __riscv_v_state {
    > + unsigned long vstart;
    > + unsigned long vl;
    > + unsigned long vtype;
    > + unsigned long vcsr;

    Don't we also need vlen to adequately determine the vector state?
    Otherwise we're going to end up dropping some state when vl isn't vlmax,
    which IIUC isn't legal.

    > + void *datap;
    > +#if __riscv_xlen == 32
    > + __u32 __padding;
    > +#endif

    Why is there padding?

    > +};
    > +
    > #endif /* __ASSEMBLY__ */
    >
    > #endif /* _UAPI_ASM_RISCV_PTRACE_H */
    > diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c
    > index 90f8ce64fa6f..34f43c84723a 100644
    > --- a/arch/riscv/kernel/asm-offsets.c
    > +++ b/arch/riscv/kernel/asm-offsets.c
    > @@ -72,6 +72,12 @@ void asm_offsets(void)
    > OFFSET(TSK_STACK_CANARY, task_struct, stack_canary);
    > #endif
    >
    > + OFFSET(RISCV_V_STATE_VSTART, __riscv_v_state, vstart);
    > + OFFSET(RISCV_V_STATE_VL, __riscv_v_state, vl);
    > + OFFSET(RISCV_V_STATE_VTYPE, __riscv_v_state, vtype);
    > + OFFSET(RISCV_V_STATE_VCSR, __riscv_v_state, vcsr);
    > + OFFSET(RISCV_V_STATE_DATAP, __riscv_v_state, datap);
    > +
    > DEFINE(PT_SIZE, sizeof(struct pt_regs));
    > OFFSET(PT_EPC, pt_regs, epc);
    > OFFSET(PT_RA, pt_regs, ra);

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