Messages in this thread Patch in this message | | | From | Geert Uytterhoeven <> | Subject | [PATCH] ARM: ptrace: Use bitfield helpers | Date | Mon, 22 Nov 2021 16:53:41 +0100 |
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The isa_mode() macro extracts two fields, and recombines them into a single value. The shift value of the J-bit may look off-by-one to the casual reader, as it is the net result of the extraction and recombination steps.
Make this more obvious by using the FIELD_GET() helper, and shifting the result into its final resting place.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- No changes in generated assembler code.
See "[PATCH 00/17] Non-const bitfield helper conversions" (https://lore.kernel.org/r/cover.1637592133.git.geert+renesas@glider.be) for background and more conversions. --- arch/arm/include/asm/ptrace.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h index 93051e2f402c8452..982514aa83c1f459 100644 --- a/arch/arm/include/asm/ptrace.h +++ b/arch/arm/include/asm/ptrace.h @@ -10,6 +10,7 @@ #include <uapi/asm/ptrace.h> #ifndef __ASSEMBLY__ +#include <linux/bitfield.h> #include <linux/types.h> struct pt_regs { @@ -35,8 +36,8 @@ struct svc_pt_regs { #ifndef CONFIG_CPU_V7M #define isa_mode(regs) \ - ((((regs)->ARM_cpsr & PSR_J_BIT) >> (__ffs(PSR_J_BIT) - 1)) | \ - (((regs)->ARM_cpsr & PSR_T_BIT) >> (__ffs(PSR_T_BIT)))) + ((FIELD_GET(PSR_J_BIT, (regs)->ARM_cpsr) << 1) | \ + FIELD_GET(PSR_T_BIT, (regs)->ARM_cpsr)) #else #define isa_mode(regs) 1 /* Thumb */ #endif -- 2.25.1
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