Messages in this thread | | | Subject | Re: [RFC 1/2] dt-bindings: clk: versaclock5: Add load capacitance properties | From | Luca Ceresoli <> | Date | Fri, 8 Jan 2021 23:49:29 +0100 |
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Hi Adam,
On 06/01/21 18:38, Adam Ford wrote: > There are two registers which can set the load capacitance for > XTAL1 and XTAL2. These are optional registers when using an > external crystal. Update the bindings to support them. > > Signed-off-by: Adam Ford <aford173@gmail.com> > --- > .../devicetree/bindings/clock/idt,versaclock5.yaml | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml > index 2ac1131fd922..e5e55ffb266e 100644 > --- a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml > +++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml > @@ -59,6 +59,18 @@ properties: > minItems: 1 > maxItems: 2 > > + idt,xtal1-load-femtofarads:
I wonder whether we should have a common, vendor independent property. In mainline we have xtal-load-pf (ti,cdce925.txt bindings) which has no vendor prefix. However I don't know how much common it is to need different loads for x1 and x2. Any hardware engineer around?
> + $ref: /schemas/types.yaml#/definitions/uint32 > + minimum: 9000 > + maximum: 25000 > + description: Optional loading capacitor for XTAL1
Nit: I think the common wording is "load capacitor", not "loading capacitor".
-- Luca
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